? semiconductor components industries, llc, 2006 october, 2006 ? rev. 5 1 publication order number: mc100el30/d mc100el30 5vecl triple d flip?flop with set and reset the mc100el30 is a triple master ? slave d flip ? flop with differential outputs. data enters the master latch when the clock input is low and transfers to the slave upon a positive transition on the clock input. in addition to a common set input individual reset inputs are provided for each flip flop. both the set and reset inputs function asynchronous and overriding with respect to the clock inputs. features ? 1200 mhz minimum toggle frequency ? 450 ps typical propagation delays ? esd protection: >2 kv human body model ? the 100 series contains temperature compensation. ? pecl mode operating range: v cc = 4.2 v to 5.7 v with v ee = 0 v ? necl mode operating range: v cc = 0 v with v ee = ? 4.2 v to ? 5.7 v ? internal input 75 k pulldown resistors ? meets or exceeds jedec spec eia/jesd78 ic latchup test ? moisture sensitivity level 1 for additional information, see application note and8003/d ? flammability rating: ul 94 v ? 0 @ 0.125 in, oxygen index: 28 to 34 ? transistor count = 347 devices ? pb ? free packages are available* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. http://onsemi.com see detailed ordering and shipping information in the package dimensions sect ion on page 5 of this data sheet. ordering information *for additional marking information, refer to application note and8002/d. marking diagram* a = assembly location wl = wafer lot yy = year ww = work week g= pb ? free package so ? 20 wb dw suffix case 751d 20 1 100el30 awlyywwg
mc100el30 http://onsemi.com 2 d1 figure 1. logic diagram and pinout: 20-lead soic (top view) r0 r1 d2 17 18 16 15 14 13 12 4 3 5678 9 q0 11 10 v cc q1 q1 v cc q2 q2 v ee d0 19 20 2 1 v cc q0 clk0 clk1 s012 clk2 r2 d r s q q d r s q q d r s q q warning: all v cc and v ee pins must be externally connected to power supply to guarantee proper operation. table 1. pin description pin function d0 ? d2 r0 ? r2 clk0 ? clk2 s012 q0 ? q2; q0 ? q2 v cc v ee ecl data inputs ecl reset inputs ecl clock inputs ecl common set input ecl differential data outputs positive supply negative supply table 2. function table r* s* d* clk* q q l l h l h l l l h h l h x x x z z x x x l h l h undef h l h l undef z = low-to-high transition x = don?t care *pin will default low when left open. table 3. maximum ratings symbol parameter condition 1 condition 2 rating unit v cc pecl mode power supply v ee = 0 v 8 to 0 v v ee necl mode power supply v cc = 0 v ? 8 to 0 v v i pecl mode input voltage necl mode input voltage v ee = 0 v v cc = 0 v v i v cc v i v ee 6 to 0 ? 6 to 0 v v i out output current continuous surge 50 100 ma ma t a operating temperature range ? 40 to +85 c t stg storage temperature range ? 65 to +150 c ja thermal resistance (junction ? to ? ambient) 0 lfpm 500 lfpm soic ? 20 soic ? 20 90 60 c/w c/w jc thermal resistance (junction ? to ? case) standard board soic ? 20 30 to 35 c/w t sol wave solder pb pb ? free <2 to 3 sec @ 248 c <2 to 3 sec @ 260 c 265 265 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability.
mc100el30 http://onsemi.com 3 table 4. pecl dc characteristics v cc = 5.0 v; v ee = 0.0 v (note 1) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 55 62 55 62 55 64 ma v oh output high voltage (note 2) 3915 3995 4120 3975 4045 4120 3975 4050 4120 mv v ol output low voltage (note 2) 3170 3305 3445 3190 3295 3380 3190 3295 3380 mv v ih input high voltage 3835 4120 3835 4120 3835 4120 mv v il input low voltage 3190 3525 3190 3525 3190 3525 mv i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. input and output parameters vary 1:1 with v cc . v ee can vary +0.8 v / ? 0.5 v. 2. outputs are terminated through a 50 resistor to v cc ? 2.0 v. table 5. necl dc characteristics v cc = 0.0 v; v ee = ? 5.0 v (note 3) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit i ee power supply current 55 62 55 62 55 64 ma v oh output high voltage (note 4) ? 1085 ? 1005 ? 880 ? 1025 ? 955 ? 880 ? 1025 ? 955 ? 880 mv v ol output low voltage (note 4) ? 1830 ? 1695 ? 1555 ? 1810 ? 1705 ? 1620 ? 1810 ? 1705 ? 1620 mv v ih input high voltage ? 1165 ? 880 ? 1165 ? 880 ? 1165 ? 880 mv v il input low voltage ? 1810 ? 1475 ? 1810 ? 1475 ? 1810 ? 1475 mv i ih input high current 150 150 150 a i il input low current 0.5 0.5 0.5 a note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 3. input and output parameters vary 1:1 with v cc . v ee can vary +0.8 v / ? 0.5 v. 4. outputs are terminated through a 50 resistor to v cc ? 2.0 v.
mc100el30 http://onsemi.com 4 table 6. ac characteristics v cc = 5.0 v; v ee = 0.0 v or v cc = 0.0 v; v ee = ? 5.0 v (note 5) ? 40 c 25 c 85 c symbol characteristic min typ max min typ max min typ max unit f max maximum toggle frequency 1.0 1.2 1.2 ghz t plh t phl propagation delay to output clk, s, r 550 800 570 820 590 840 ps t s t h setup time hold time 150 200 0 100 150 200 0 100 150 200 0 100 ps t rr set/reset recovery 400 200 400 200 400 200 ps t pw minimum pulse width clk set, reset 400 650 400 650 400 650 ps t jitter cycle ? to ? cycle jitter tbd tbd tbd ps t r t f output rise/fall times q (20% ? 80%) 280 550 280 450 550 280 550 ps note: device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printe d circuit board with maintained transverse airflow greater than 500 lfpm. electrical parameters are guaranteed only over the declared operating temperature range. functional operation of the device exceeding these conditions is not implied. device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 5. v ee can vary +0.8 v / ? 0.5 v. figure 2. typical termination for output driver and device evaluation (see application note and8020/d ? termination of ecl logic devices.) driver device receiver device qd q d z o = 50 z o = 50 50 50 v tt v tt = v cc ? 2.0 v
mc100el30 http://onsemi.com 5 ordering information device package package ? mc100el30dw soic ? 20 38 units / rail mc100el30dwg soic ? 20 (pb ? free) 38 units / rail mc100el30dwr2 soic ? 20 1000 / tape & reel mc100el30dwr2g soic ? 20 (pb ? free) 1000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. resource reference of application notes an1405/d ? ecl clock distribution techniques an1406/d ? designing with pecl (ecl at +5.0 v) an1503/d ? eclinps i/o spice modeling kit an1504/d ? metastability and the eclinps family an1568/d ? interfacing between lvds and ecl an1672/d ? the ecl translator guide and8001/d ? odd number counters design and8002/d ? marking and date codes and8020/d ? termination of ecl logic devices and8066/d ? interfacing with eclinps and8090/d ? ac characteristics of ecl devices
mc100el30 http://onsemi.com 6 package dimensions 20 1 11 10 b 20x h 10x c l 18x a1 a seating plane h x 45 e d m 0.25 m b m 0.25 s a s b t e t b a dim min max millimeters a 2.35 2.65 a1 0.10 0.25 b 0.35 0.49 c 0.23 0.32 d 12.65 12.95 e 7.40 7.60 e 1.27 bsc h 10.05 10.55 h 0.25 0.75 l 0.50 0.90 0 7 notes: 1. dimensions are in millimeters. 2. interpret dimensions and tolerances per asme y14.5m, 1994. 3. dimensions d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of b dimension at maximum material condition. so ? 20 wb dw suffix case 751d ? 05 issue g on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 mc100el30/d eclinps are registered trademarks of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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